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INTEGRATED CIRCUITS
NE56610/11/12-XX System reset
Product data Supersedes data of 2001 Apr 24 File under Integrated Circuits, Standard Analog 2001 Jun 19
Philips Semiconductors
Philips Semiconductors
Product data
System reset
NE56610/11/12-XX
GENERAL DESCRIPTION
The NE56610/11/12-XX series is a family of devices designed to generate a reset signal for a variety of microprocessor and logic systems. Accurate reset signals are generated during momentary power interruptions or when ever power supply voltages sag to intolerable levels. The NE56610/11/12 incorporates an internal timer to provide reset delay and ensure proper operating voltage has been attained. In addition, a manual reset pin (M/R) is available. An Open Collector output topology provides adaptability for a wide variety of logic and microprocessor systems. NE56610/11/12 is available in the SOT23-5 surface mount package.
FEATURES
* 12 VDC maximum operating voltage * Low operating voltage (0.65 V) * Manual Reset input * SOT23-5 surface mount package * Offered in reset thresholds of 2.5, 2.7, 2.9, 3.9, 4.2, 4.5 VDC * Internal reset delay timer
- NE56610 (50 ms typical) - NE56611 (100 ms typical) - NE56612 (200 ms typical)
APPLICATIONS
* Microcomputer systems * Logic systems * Battery monitoring systems * Back-up power supply circuits * Voltage detection circuits * Mechanical reset circuits
SIMPLIFIED DEVICE DIAGRAM
VDD M/R 1 VCC 5 R RESET DELAY R VREF 4 VOUT RESET
NE56610/11/12-XX
RPU
VDD
CPU
3 GND
2 SUB
GND
SL01362
Figure 1. Simplified device diagram.
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Philips Semiconductors
Product data
System reset
NE56610/11/12-XX
ORDERING INFORMATION
TYPE NUMBER NE56610-XXGW NE56611-XXGW NE56612-XXGW PACKAGE NAME SOT23-5, SOT25, SO5 SOT23-5, SOT25, SO5 SOT23-5, SOT25, SO5 DESCRIPTION plastic small outline package; 5 leads (see dimensional drawing) plastic small outline package; 5 leads (see dimensional drawing) plastic small outline package; 5 leads (see dimensional drawing) TEMPERATURE RANGE -20 to +75 C -20 to +75 C -20 to +75 C TYPICAL RESET DELAY 50 ms 100 ms 200 ms
NOTE: Each device has six detection voltage options, indicated by the XX on the `Type number'. XX 25 27 29 39 42 45 DETECT VOLTAGE (Typical) 2.5 V 2.7 V 2.9 V 3.9 V 4.2 V 4.5 V
Part number marking
Each device is marked with a four letter code. The first three letters designate the product. The fourth letter, represented by `x', is a date tracking code. For example, ACNB is device ACN (the NE56610-25 reset) produced in time period `B'. Part number NE56610-25 NE56610-27 NE56610-29 NE56610-39 NE56610-42 NE56610-45 Marking ACNx ACMx ACLx ACKx ACJx ACHx Part number NE56611-25 NE56611-27 NE56611-29 NE56611-39 NE56611-42 NE56611-45 Marking ACVx ACUx ACTx ACSx ACRx ACPx Part number NE56612-25 NE56612-27 NE56612-29 NE56612-39 NE56612-42 NE56612-45 Marking ACBx ACAx ACZx ACYx ACXx ACWx
PIN CONFIGURATION
PIN DESCRIPTION
PIN SYMBOL M/R SUB GND VOUT VCC DESCRIPTION Manual Reset input. Connect to ground when not using. Substrate pin. Connect to ground. Ground Reset HIGH output pin Positive power supply input 1 2 3
4 VOUT
M/R
1
5
VCC
SUB
2
NE56610-XX NE56611-XX NE56612-XX
GND
3
4 5
SL01361
Figure 2. Pin configuration.
MAXIMUM RATINGS
SYMBOL VCC VM/R Tamb Tstg P Power supply voltage Manual Reset input voltage Operating ambient temperature Storage temperature Power dissipation PARAMETER MIN. -0.3 -0.3 -20 -40 - MAX. 12 12 75 125 150 UNIT V V C C mW
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Philips Semiconductors
Product data
System reset
NE56610/11/12-XX
ELECTRICAL CHARACTERISTICS
Characteristics noted with M/R pin connected to ground. Typical values reflect appropriate average value at Tamb = 25 C. SYMBOL VS PARAMETER Threshold detection CONDITIONS VCC falling; RL = 470 ; VOL 0.4 V TEST CIRCUIT PART # -45 -42 -39 -29 -27 -25 VS TC/VS VOL ILO ICCL ICCH tDLH Hysteresis Threshold temperature coefficient LOW-level output voltage Output leakage current Circuit current (output LOW) Circuit current (output HIGH) Reset delay time HIGH (Note 1) VS = VSH (rising VCC) - VSL (falling VCC); RL = 470 RL = 470 ; -20 C Tamb +75 C VCC = VS(min) - 0.05 V; RL = 470 VCC = 10 V VCC = VS(min) - 0.05 V; RL = VCC = VS(typ) / 0.85 V; RL = RL = 4.7 k; CL = 100 pF 2 Fig. 21 tDHL VOPL IOL1 IOL2 VM/RH IM/RH VM/RL tM/R Reset delay time LOW (Note 2) Operating supply voltage Output sink current 1 Output sink current 2 HIGH-level M/R threshold voltage (Note 3) HIGH-level M/R threshold current LOW-level M/R threshold voltage M/R pulse width (Note 4) VM/RH = 2.0 V RL = 4.7 k; CL = 100 pF RL = 4.7 k; VOL 0.4 V VCC = VS(min) - 0.05 V; RL = 0 VCC = VS(min) - 0.05 V; RL = 0; -20 C Tamb +75 C 1 Fig. Fig 20 1 Fig. 20 All All All All All All
NE56610 NE56611 NE56612
MIN. 4.3 4.0 3.7 2.75 2.55 2.35 30 - - - - - 30 60 120 - - -8.0 -6.0 2.0 - -0.3 15
TYP. 4.5 4.2 3.9 2.90 2.70 2.50 50 0.01 0.01 - 300 15 50 100 200 20 0.65 - - - 10 - -
MAX. 4.7 4.4 4.1 3.05 2.85 2.65 100 - 0.4 0.1 500 25 75 150 300 - 0.85 - - - 60 0.8 -
UNIT V V V V V V mV %/C V A A A ms ms ms s V mA mA V A V s
All All All All All All All All
NOTES: 1. tDLH measured with VCC = (VS(typ) - 0.4 V) and abruptly transitioning to (VS(typ) + 0.4 V). tDLH is the duration from VCC transition HIGH to output transition HIGH. 2. tDHL measured with VCC = (VS(typ) + 0.4 V) and abruptly transitioning to (VS(typ) - 0.4 V). tDHL is the duration from VCC transition LOW to output transition LOW. 3. Ramp M/R voltage until output RESET goes LOW. 4. Minimum M/R pulse width for detection.
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Philips Semiconductors
Product data
System reset
NE56610/11/12-XX
TYPICAL PERFORMANCE CURVES
0.10 VS, NORMALIZED DETECTION (V) I CCL, CIRCUIT ON CURRENT (A) THRESHOLD NORMALIZED TO 25 C RL (PULL-UP TO VCC) 470 VOL 0.4 V 0.05 500 VCC = VS(min) - 0.05 V RL = 400
0.00
300
-0.05
200
-0.10 -50
-25
0
25
50
75
100
125
100 -50
-25
0
25
50
75
100
125
Tamb, AMBIENT TEMPERATURE (C)
Tamb, AMBIENT TEMPERATURE (C)
SL01363
SL01334
Figure 3. Normalized detection versus temperature.
Figure 4. Circuit ON current versus temperature.
80 VS , DETECTION HYSTERESIS (mV) I CCH , CIRCUIT OFF CURRENT (A) VS = VSH - VSL RL (PULL-UP TO VCC) = 470 70
30 VCC = VS(typ) + 0.85 V RL = 25
60
20
50
15
40 -50
-25
0
25
50
75
100
125
10 -50
-25
0
25
50
75
100
125
Tamb, AMBIENT TEMPERATURE (C)
Tamb, AMBIENT TEMPERATURE (C)
SL01365
SL01366
Figure 5. Detection hysteresis versus temperature.
Figure 6. Circuit OFF current versus temperature.
120 VCC = VS(min) - 0.05 V RL (PULL-UP TO VCC) = 470 VOL, LOW-LEVEL OUTPUT (mV) 100 VOPL, OPERATING SUPPLY (mV)
900 VOL 0.4 V RL = 4.7 k 800
700
80
600
60
500
40 -50
-25
0
25
50
75
100
125
400 -50
-25
0
25
50
75
100
125
Tamb, AMBIENT TEMPERATURE (C)
Tamb, AMBIENT TEMPERATURE (C)
SL01367
SL01368
Figure 7. LOW-level output voltage versus temperature.
Figure 8. Operating supply voltage versus temperature.
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Philips Semiconductors
Product data
System reset
NE56610/11/12-XX
70 VCC = VS(min) - 0.05 V RL = 0 I OL, CIRCUIT ON CURRENT (A) 60 I M/RH , M/R INPUT HIGH CURRENT ( A)
25 VCC = 5.0 V VM/RH = 2.0 V 20
50
15
40
10
30 -50
-25
0
25
50
75
100
125
5 -50
-25
0
25
50
75
100
125
Tamb, AMBIENT TEMPERATURE (C)
Tamb, AMBIENT TEMPERATURE (C)
SL01369
SL01370
Figure 9. Output ON current versus temperature.
Figure 10. M/R input HIGH current versus temperature.
250 t DLH , RESET DELAY TIME HIGH (ms) 225 200 175 150 125 SA56611 100 75 SA56610 50 25 -50 -25 0 25 50 75 100 125 RL = 4.7 k CL = 100 pF SA56612
1.6 VCC = 5.0 V VM/RH, M/R THRESHOLD HIGH (V) 1.4
1.2
1.0
0.8
0.6 -50
-25
0
25
50
75
100
125
Tamb, AMBIENT TEMPERATURE (C)
Tamb, AMBIENT TEMPERATURE (C)
SL01376
SL01377
Figure 11. Reset delay time HIGH versus temperature.
Figure 12. M/R threshold HIGH versus temperature.
14 t DHL, RESET DELAY TIME LOW (s) RL = 4.7 k CL = 100 pF I CC, SUPPLY CURRENT ( A)
500 RL = 470 Tamb = 25 C 400 VOUT
5.0
13
300 ICC 200
12
VS
3.0
2.0
11
100
1.0
10 -50
0 -25 0 25 50 75 100 125 0 1.0 2.0 3.0 4.0 Tamb, AMBIENT TEMPERATURE (C) VCC, SUPPLY VOLTAGE (V)
0 5.0
SL01378
SL01379
Figure 13. Reset delay time LOW versus temperature.
Figure 14. ICC and VOUT versus supply voltage.
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VOUT , OUTPUT VOLTAGE (V)
4.0
Philips Semiconductors
Product data
System reset
NE56610/11/12-XX
40 t OUT , OUTPUT SINK CURRENT (mA) 35 30 25 20 15 10 5 0 0 -0.2 -0.4 -0.6 -0.8 -1.0 VOUT, OUTPUT VOLTAGE (V) VCC = VS(min) - 0.05 V RL = 0 Tamb = 25 C
SL01378
Figure 15. Output sink current versus output voltage.
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Philips Semiconductors
Product data
System reset
NE56610/11/12-XX
TECHNICAL DESCRIPTION
The NE56610/11/12-XX devices comprise a family of devices designed to monitor the supply voltage and output a RESET signal whenever the supply voltage sags below an acceptable system level or when supply voltage interruptions occur. Each of the three devices of the family are available with a fixed detection threshold voltage (2.5, 2.7, 2.9, 3.9, 4.2, 4.5 V). The device family is very versatile and adaptable for a wide variety of applications. The devices are designed to have a detection threshold hysteresis of 50 mV typical. When the supply voltage delivered to the device falls to the detection sense level (VS), a RESET is output and not released until the supply voltage rises to the level of VS or greater. These levels are termed VL (synonymous with VS) and VH, and the difference of VH - VL = VHYS (the hysteresis voltage value). Internally, the devices incorporate a fixed internal digital timer which, when activated, produces a fixed internal delay before a RESET signal is output. This delay can not be influenced externally. The NE56510 has an internal delay of 50 ms, while the NE56611 and NE56612 have internal delays of 100 ms and 200 ms respectively. Incorporating a delay in the output RESET prevents output oscillations from occurring and helps ensure system supply voltages are adequate and stabilized before the microprocessor is placed into full operation. Where there is little or no delay in output RESET, there is a possibility of output oscillations occurring, particularly where high impedance supply sources are used. In addition, the devices have a manual reset (M/R) pin, which when pulled to a HIGH voltage state, forces a RESET signal at the output. The M/R pin should always be connected to ground when manual reset is not used. The output of the NE56610/11/12 utilizes a low side open collector topology, requiring the user to use an external pull-up resistor (RPU) to the VCC power source. Although this may be regarded as a disadvantage, it is an advantage in many sensitive applications. The open drain output topology does not have the capability of sourcing reset current to a microprocessor when both are operated from a common supply. It is for this reason the device family offers a safe inter-connect to a wide variety of microprocessors.
VCC
5 DELAY R OSC T R Q 4 VOUT RESET
R
R
R
R 3 GND
R M/R 1
NE56610/11/12-XX
R 2 SUB
SL01382
Figure 16. Functional diagram
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Philips Semiconductors
Product data
System reset
NE56610/11/12-XX
TIMING DIAGRAM
The Timing Diagram shown in Figure 17 depicts the operation of the device. Letters indicate events on the TIME axis. A: At start-up, event `A', the VCC and VOUT (RESET) voltages begin to rise. The reset voltage initially starts to rise but then abruptly returns to a LOW voltage state. This is due to VCC reaching a level (approximately 0.8 V) which activates the internal bias circuitry asserting a RESET state at VOUT. B: At event `B', the fixed internal delay time (tDLH) is initiated. This is caused and coincident to VCC rising to the threshold level of VSH. At this level the device is in full operation. The output remains in a low voltage state as VCC rises above VSH. This is normal. C: At event `C', VCC is above the undervoltage detection threshold (VSL) and the fixed internal delay time (tDLH) has elapsed. At this instant the device releases the hold on VOUT and VOUT (RESET) goes to a high state. In a microprocessor-based system these events remove the reset from the microprocessor, allowing the microprocessor to be fully functional. D-E: At event `D', VCC begins to ramp down and VOUT follows. VCC continues to fall until the undervoltage threshold (VSL) is reached at `E'. This causes the device to generate a reset signal. E-F: Between `E' and `F', VCC recovers and starts to rise. F: At event `F', VCC reaches the upper threshold (VSH). Once again, the tDLH fixed internal delay time is initiated. G: At event `G', VCC is above the VSL undervoltage detection voltage and the tDLH fixed internal delay time has elapsed. At this point the device releases the hold on VOUT and VOUT goes to a HIGH state. H-K: At event `H', VCC is normal, but a manual reset voltage (HIGH voltage state) has been applied to the M/R pin. This forces the output into a reset (LOW voltage state). Removal of the manual reset voltage, at `J', from the M/R pin initiates the fixed internal delay time, and at `K', the internal delay time has elapsed and VOUT goes to a HIGH voltage state. L: At event `L', VCC sags to the VSL undervoltage threshold level and the output goes into low voltage reset condition. M: At event `M', the VCC voltage has deteriorated to a level where normal internal circuit bias is no longer able to maintain the device and VOUT reset assertion is no longer be guaranteed. As a result, VOUT may exhibit a slight rise to something less than 0.8 V. As VCC decays even further, VOUT reset also decays to zero.
VS VSH VSS = VSL V
VCC
V VOUT RESET tDLH tDLH tDLH
V M/R VRES
0 A B C D E F G H J K L TIME M
SL01381
Figure 17. Timing diagram.
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Philips Semiconductors
Product data
System reset
NE56610/11/12-XX
APPLICATION INFORMATION
When the manual reset is not needed, the M/R, manual reset pin is connected to ground as shown in Figure 18. A capacitor connected from VCC to ground is recommended when the VCC supply impedance is appreciably high. This may be the situation with a poor quality or aged battery.
TO VCC RPU TO CPU RESET PIN
MANUAL SWITCH TO CPU RESET PIN
5 VCC
4 VOUT
TO VCC RPU
M/R 5 VCC 4 VOUT CLAMP DIODE M/R 1 SUB 2 GND 3 RPD 1
SUB 2
GND 3
SL01384
Figure 19. Manual Reset circuit When a manual reset is used, it is suggested a resistor (RPU) be connected from the M/R pin to ground so as to provide a pull-down ground reference for the M/R pin when not in use. This will reduce the possibility of an induced erroneous voltage being imposed on the M/R pin. This can be a solution in noisy applications where the manual reset line is of considerable length and subject to picking up induced voltages. The M/R pin can be pulled to a HIGH voltage state whenever a manual reset is imposed. The only disadvantage to this is a small amount of additional current flow through the pull-down ground reference resistor when the M/R pin is pulled to a HIGH state.
SL01383
Figure 18. Typical hard reset circuit Figure 19 shows a circuit with a manual reset switch. When the manual switch is closed, VOUT reset is a low voltage state. Conversely, when it is opened, VOUT reset is a HIGH voltage state. As a precaution, a clamp diode is placed from the M/R pin to ground to ensure that the pin does not go below -0.3 V.
TEST CIRCUITS
A2 RPU A1 5 VCC 5 V1 VCC VOUT INPUT PULSE M/R 1 VCC M/R 10 F/10 V 1 2 3 CL 100 pF SUB GND V2 CRT SUB 2 GND 3 5.0 V 4 4 VOUT 10 F/10 V RPU
VM/R CRT = OSCILLOSCOPE
INPUT PULSE
VS(typ) + 0.4 V A = DC AMPMETER V = DC VOLTMETER VS(typ) - 0.4 V 0V
SL01385
Figure 20. Test circuit 1
SL01386
Figure 21. Test circuit 2 2001 Jun 19 10
Philips Semiconductors
Product data
System reset
NE56610/11/12-XX
PACKING METHOD
The NE56610/11/12 is packed in reels, as shown in Figure 22.
GUARD BAND
TAPE REEL ASSEMBLY
TAPE DETAIL
COVER TAPE
CARRIER TAPE
BARCODE LABEL
BOX
SL01305
Figure 22. Tape and reel packing method
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Philips Semiconductors
Product data
System reset
NE56610/11/12-XX
SOT23-5: plastic small outline package; 5 leads; body width 1.5 mm
1.35
1.2 1.0
0.025
0.55 0.41
0.22 0.08
3.00 2.70
1.70 1.50
0.55 0.35
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Philips Semiconductors
Product data
System reset
NE56610/11/12-XX
NOTES
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Philips Semiconductors
Product data
System reset
NE56610/11/12-XX
Data sheet status
Data sheet status [1] Objective data Preliminary data Product status [2] Development Qualification Definitions This data sheet contains data from the objective specification for product development. Philips Semiconductors reserves the right to change the specification in any manner without notice. This data sheet contains data from the preliminary specification. Supplementary data will be published at a later date. Philips Semiconductors reserves the right to change the specification without notice, in order to improve the design and supply the best possible product. This data sheet contains data from the product specification. Philips Semiconductors reserves the right to make changes at any time in order to improve the design, manufacturing and supply. Changes will be communicated according to the Customer Product/Process Change Notification (CPCN) procedure SNW-SQ-650A.
Product data
Production
[1] Please consult the most recently issued datasheet before initiating or completing a design. [2] The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at URL http://www.semiconductors.philips.com.
Definitions
Short-form specification -- The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Limiting values definition -- Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information -- Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification.
Disclaimers
Life support -- These products are not designed for use in life support appliances, devices or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Right to make changes -- Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. Philips Semiconductors 811 East Arques Avenue P.O. Box 3409 Sunnyvale, California 94088-3409 Telephone 800-234-7381 (c) Copyright Philips Electronics North America Corporation 2001 All rights reserved. Printed in U.S.A. Date of release: 06-01 Document order number: 9397 750 08452
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2001 Jun 19 14

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